1. Field of the Invention
The present invention relates to a semiconductor device and a method of making the same, and more particularly, to a semiconductor device having an electrode wiring structure in which a through-hole formed in insulating layers is filled with a conductive material, and to a method of making the same.
2. Description of the Related Art
For providing an electrode wiring structure in a semiconductor device, a through-hole is formed in an insulating layer, and a conductive material is deposited on the insulating layer so as to fill the through-hole therewith. An example of such a structure will be described below with reference to the accompanying drawings.
FIG. 4 shows a drain region in a section of a semi-conductor device such as a static RAM including a MOS transistor (MOSFET) as a circuit element. An N-type diffused region 2, which serve as a drain, is formed in a surface region of a P-type silicon substrate 1, and a silicon oxide layer 3 (which is also called an inter-level insulator) is deposited on the substrate 1. A through-hole 4 is provided in the insulating layer 3 so as to reach the N-type diffused region 2. An Al alloy containing 1 wt % of Si, for example, is deposited on the entire surface of the silicon oxide layer 3 by means of sputtering techniques, and the resultant metal layer is patterned to provide an interconnection layer 5. At this time, when the diameter of the through-hole is large, the through-hole is filled with the Al--Si alloy, as shown in FIG. 4, and the interconnection layer 5 is electrically connected to the N-type diffused region 2.
With a tendency toward a fine device structure, an aspect ratio of the through-hole, i.e., a depth/diameter ratio is increasing. Therefore, a unwanted cavity 6 is easily formed by a deposited configuration in the sputtering as shown in FIG. 5. Poor step coverage may occur with a certain probability, and electrical conduction may be not assured.
As a countermeasure against the above disadvantage there has been recently developed a method for depositing a conductive material into only through-holes. More particularly as such a method, it is effective to selectively and epitaxially grow a silicon layer in only the through-holes. The discontinuity in the through-holes may be substantially eliminated (e.g., Tanno et al., Jap. J. of Appl. phys., vol. 21, No. 9, 1982, p.L564). As shown in FIG. 6, after a through-hole 4 is formed in a silicon oxide layer 3 provided on a P-type silicon substrate 1 so as to reach an N-type diffused region 2, a silicon layer doped with an N-type impurity is epitaxially grown in only the through-hole by means of selective epitaxial growth techniques to provide a low resistivity single crystal silicon layer 7 having no thickness step with the silicon oxide layer 3. Thereafter, when an Al--Si layer is provided by the sputtering, no cavity and no discontinuity as shown in FIG. 5 may occur. Subsequently, a wiring structure is provided by well-known photoetching techniques.
In such a conventional selective epitaxial growth, a silicon oxide layer containing a large amount (10.sup.19 atoms/cm.sup.3 or more) of phosphorus or boron has been used as an insulating layer. A through-hole is formed in the silicon oxide layer, and a silicon layer is then deposited in the through-hole. Since this deposition must be performed at a high temperature of 900.degree. C., the phosphorus or boron is evaporated from the silicon oxide layer and added to the silicon layer to be deposited in the through-hole. Accordingly, it is difficult to control the conductivity type or resistance value of the silicon layer. Since the silicon oxide layer easily absorbs unwanted impurities such as heavy metals (e.g., Fe or Ni) by gettering, it may be contaminated during the formation of the through-hole.
As described above, in a method wherein the interconnection layer is provided on the insulating layer and the conductive material is simultaneously filled in the through-hole, unwanted cavity or discontinuity may occur at the through-hole when its aspect ratio becomes large. On the contrary, in the method wherein the silicon layer is grown in only the through-hole by means of the selective epitaxial growth and the interconnection layer is then provided, unwanted discontinuity and the like may not occur at the through-hole, thereby eliminating the problem described above. However, in the selective epitaxial growth, when the silicon layer is deposited in the through-hole, Phosphorus or boron may be evaporated from the silicon oxide layer. Accordingly, it is difficult to control the conductivity type or resistance value of the deposited silicon layer. In addition, the insulating layer may absorb heavy metals by gettering, thereby bringing deterioration of the devices.